From: Keir Fraser Date: Tue, 16 Jun 2009 10:30:45 +0000 (+0100) Subject: vtd: Fix flush for SRTP and SIRTP set X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~13774 X-Git-Url: https://dgit.raspbian.org/%22http://www.example.com/cgi/%22/%22http:/www.example.com/cgi/%22?a=commitdiff_plain;h=2e9127c7a5b339e1993e08d068836fdac04490cf;p=xen.git vtd: Fix flush for SRTP and SIRTP set SRTP (Set Root Table Pointer) operation must be set before enable or re-enable DMA remapping. And after set it, software must globally invalidate the context-cache and then globally invalidate the IOTLB. This is required to ensure hardware uses only the remapping structures referenced by the new root-table pointer, and not stale cached entries. Similarly, SIRTP (Set Interrupt Remap Table Pointer) operation must be set before enable or re-enable Interrupt remapping, and after set it, software must globally invalidate the interrupt entry cache. This patch adds global context and iotlb flush after set root entry, and globally flushs interrupt entry cache before enabling Interrupt remapping. And remove the iommu_flush_all in iommu_resume becuase it becomes redundant after adds flush for SRTP in init_vtd_hw. Signed-off-by: Weidong Han --- diff --git a/xen/drivers/passthrough/vtd/intremap.c b/xen/drivers/passthrough/vtd/intremap.c index f56c5ae069..b05396e9e1 100644 --- a/xen/drivers/passthrough/vtd/intremap.c +++ b/xen/drivers/passthrough/vtd/intremap.c @@ -568,6 +568,9 @@ int enable_intremap(struct iommu *iommu) IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, dmar_readl, (sts & DMA_GSTS_SIRTPS), sts); + /* After set SIRTP, must globally invalidate the interrupt entry cache */ + iommu_flush_iec_global(iommu); + /* enable comaptiblity format interrupt pass through */ gcmd |= DMA_GCMD_CFI; dmar_writel(iommu->reg, DMAR_GCMD_REG, gcmd); @@ -582,9 +585,6 @@ int enable_intremap(struct iommu *iommu) IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, dmar_readl, (sts & DMA_GSTS_IRES), sts); - /* After set SIRTP, we should do globally invalidate the IEC */ - iommu_flush_iec_global(iommu); - return init_apic_pin_2_ir_idx(); } diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c index 0f4b31f581..56cb988e93 100644 --- a/xen/drivers/passthrough/vtd/iommu.c +++ b/xen/drivers/passthrough/vtd/iommu.c @@ -1639,13 +1639,6 @@ static int init_vtd_hw(void) for_each_drhd_unit ( drhd ) { iommu = drhd->iommu; - ret = iommu_set_root_entry(iommu); - if ( ret ) - { - gdprintk(XENLOG_ERR VTDPREFIX, "IOMMU: set root entry failed\n"); - return -EIO; - } - if ( iommu->vector < 0 ) { vector = iommu_set_interrupt(iommu); @@ -1695,6 +1688,23 @@ static int init_vtd_hw(void) } } + for_each_drhd_unit ( drhd ) + { + iommu = drhd->iommu; + ret = iommu_set_root_entry(iommu); + if ( ret ) + { + gdprintk(XENLOG_ERR VTDPREFIX, "IOMMU: set root entry failed\n"); + return -EIO; + } + } + + /* + * After set root entry, must globally invalidate context cache, and + * then globally invalidate IOTLB + */ + iommu_flush_all(); + return 0; } @@ -1931,35 +1941,11 @@ void iommu_resume(void) { struct acpi_drhd_unit *drhd; struct iommu *iommu; - struct iommu_flush *flush; u32 i; if ( !iommu_enabled ) return; - /* Re-initialize the register-based flush functions. - * In iommu_flush_all(), we invoke iommu_flush_{context,iotlb}_global(), - * but at this point, on hosts that support QI(Queued Invalidation), QI - * hasn't been re-enabed yet, so for now let's use the register-based - * invalidation method before invoking init_vtd_hw(). - */ - if ( iommu_qinval ) - { - for_each_drhd_unit ( drhd ) - { - iommu = drhd->iommu; - flush = iommu_get_flush(iommu); - flush->context = flush_context_reg; - flush->iotlb = flush_iotlb_reg; - } - } - - /* Not sure whether the flush operation is required to meet iommu - * specification. Note that BIOS also executes in S3 resume and iommu may - * be touched again, so let us do the flush operation for safety. - */ - iommu_flush_all(); - if ( init_vtd_hw() != 0 && force_iommu ) panic("IOMMU setup failed, crash Xen for security purpose!\n");